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过程工程学报 ›› 2020, Vol. 20 ›› Issue (2): 123-132.DOI: 10.12034/j.issn.1009-606X.219169

• 流动与传递 • 上一篇    下一篇

多孔介质方腔内置芯片热流耦合的LBM数值模拟

陈 岳 1, 马 明 2, 张 莹 3* , 过海龙 3, 万启坤 3   

  1. 1. 南昌大学高等研究院,江西 南昌 330031 2. 圣母大学航空机械系,印第安纳州 46556,美国 3. 南昌大学机电工程学院,江西 南昌 330031
  • 收稿日期:2019-03-28 修回日期:2019-06-01 出版日期:2020-02-22 发布日期:2020-02-19
  • 通讯作者: 张莹 yzhan2033@163.com
  • 基金资助:
    国家自然科学基金;江西省自然科学基金

Lattice Boltzmann numerical simulation of flow thermal coupling in porous media with electronic chips

Yue CHEN1, Ming MA2, Ying ZHANG3*, Hailong GUO3, Qikun WAN3   

  1. 1. Institute for Advanced Study, Nanchang University, Nanchang, Jiangxi 330031, China 2. Department of Aerospace and Mechanical Engineering, The University of Notre Dame, Indiana 46556, America 3. School of Mechatronics Engineering, Nanchang University, Nanchang, Jiangxi 330031, China
  • Received:2019-03-28 Revised:2019-06-01 Online:2020-02-22 Published:2020-02-19
  • Contact: Ying ZHANG yzhan2033@163.com
  • Supported by:
    ;Natural Science Foundation of Jiangxi Province

摘要: 基于格子Boltzmann方法的渗流多孔介质耦合双分布模型,对表征体元(REV)尺度下含电子芯片的多孔介质自然对流进行数值模拟研究,主要研究不同物性参数对多孔介质自然对流的影响以及单电子芯片尺寸、多芯片布局等因素对电子芯片表面散热性能的影响。得出了如下研究结果:对于恒温单芯片的多孔介质自然对流,在达西数Da=10-2时存在临界芯片尺寸。在临界芯片尺寸条件下,流场扰动较更小的芯片尺寸更强,传热性能却几乎不变。不同瑞利数Ra条件下临界芯片尺寸不同,Ra越大,临界芯片尺寸越大,在Ra=103时临界芯片尺寸为0.203125倍方腔边长,Ra=104时临界芯片尺寸为0.25倍方腔边长,Ra=105时临界芯片尺寸为0.390625倍方腔边长。当多孔介质渗透率降低时,即Da=10-4时,不存在临界芯片尺寸,且芯片表面和冷壁处的平均Nusselt数均随Ra的增大而增大。对于恒温多芯片的多孔介质自然对流,在多孔介质渗透率较大(Da=10-2)的情况下芯片横排布置可取得最佳换热效果,在渗透率较小(Da=10-4)时芯片布局宜采用对角分布。

关键词: LBM, 多孔介质, 对流传热, 电子芯片

Abstract: A coupling double-distribution model was developed for simulating natural convection of porous media containing electronic chips based on the lattice Boltzmann method. The effects of different physical parameters on the natural convection of porous media were studied, and the obtained results were compared with the previous literature’s data to verify the feasibility and reliability of the current model. On this basis, effects of the size of the single electronic chip, the layout of the multiple chips, and the surface temperature fluctuation of the single chip on the heat transfer performance of the surface of the electronic chip had been comprehensively investigated. In addition, in order to quantitatively analyze the influence of various parameters on heat dissipation of the electronic chip, the average Nusselt number was employed to evaluate the heat transfer performance, and the following results were obtained: regarding the natural convection inside the porous media with a single chip under a constant temperature boundary condition had a critical chip size at Da=10-2. Under the condition of critical chip size, the distribution of the flow field was quite stronger compared with the case of a chip with a smaller size, but the heat transfer performance was almost the same. When Ra=103, the critical chip size was 0.203125 times the cavity side length, and the critical chip size was 0.25 times the cavity side length at Ra=104. And the critical chip size was 0.390625 times the cavity side length at Ra=105. When the permeability of porous media decreased, the critical chip size did not exist, and the average Nusselt number in the chip surface and the cold wall increased accordingly. For the natural convection occurred in a constant-temperature porous media with multiple-chips, the horizontal arrangement of the chips can present a high heat transfer ratio in the case of porous medium with large permeability (Da=10?2), while for the porous media with small permeability (Da=10?4), the chip layout should be diagonally distributed.

Key words: LBM, Porous media, Convection heat transfer, Electronic chips